CHIPS Training in America Act of 2024

(1) in paragraph (1)—

(A) by inserting, in consultation with the Department of Commerce, after National Science Foundation; and

(B) by inserting, including establishment and maintenance of a single publicly accessible online clearinghouse of microelectronics education and workforce development information before the period at the end of the paragraph;

(2) by redesignating paragraph (3) as paragraph (6); and

(3) by inserting after paragraph (2) the following:

Not later than 90 days after the date of enactment of the CHIPS Training in America Act of 2024, the Director of the National Science Foundation shall establish key performance indicators to measure and monitor the impact of Fund allocations on growing the microelectronics workforce.

Not later than 90 days after the date of enactment of the CHIPS Training in America Act of 2024, the Director of the National Science Foundation and the Secretary of Commerce shall jointly develop quantitative goals for growing the domestic semiconductor workforce.

Such goals shall be submitted to—

(i) the Committee on Appropriations of the Senate, the Committee on Commerce, Science, and Transportation of the Senate, and the Committee on Health, Education, Labor, and Pensions of the Senate; and

(ii) the Committee on Appropriations of the House of Representatives, the Committee on Science, Space, and Technology of the House of Representatives, and the Committee on Education and the Workforce of the House of Representatives.

In this subsection, the term National Semiconductor Technology Center means the entity established under section 9906(c) of the William M. (Mac) Thornberry National Defense Authorization Act for Fiscal Year 2021 (15 U.S.C. 4656(c)).

(1) in subparagraph (C)—

(A) in clause (i), by striking and after the semicolon;

(B) in clause (ii), by striking the period at the end and inserting; and; and

(C) by adding at the end the following:

(iii) the development of competency-based degree, credentialing, and certificate frameworks to increase standardization within semiconductor and microelectronics workforce development programs.

(C) ; and

(2) by inserting the following after subparagraph (C):

(i) Subject to clause (ii), in coordination with the National Science Foundation, assist in the management and maintenance of the single publicly accessible online clearinghouse authorized in section 102(d) of Public Law 117–167.

(ii) If the National Science Foundation and the National Semiconductor Technology Center agree, the National Semiconductor Technology Center may take over primary management and maintenance of such single publicly accessible online clearinghouse, with support from the National Science Foundation.

(1) in paragraph (2)—

(A) by redesignating subparagraph (I) as subparagraph (J); and

(B) by inserting after subparagraph (H) the following:

(I) For purposes of the duties described in subparagraph (D) of paragraph (3) only, the Secretary of Labor, the Secretary of Education, and the Secretary of Veterans Affairs.

(B) ; and

(2) in paragraph (3), by inserting after subparagraph (C) the following:

Not later than 1 year after the date of enactment of the CHIPS Training in America Act of 2024, in consultation with appropriate stakeholders in the microelectronics industry, relevant researchers or experts at institutions of higher education, economic development organizations, and other apposite stakeholders, the Subcommittee shall develop a 5-year national strategy on microelectronics workforce development.

For the purposes of this subparagraph only such Subcommittee shall also include the Secretary of Labor, the Secretary of Education, and the Secretary of Veterans Affairs.

The strategy developed under this subparagraph shall—

(I) specify and prioritize annual and long-term objectives, including the role of each agency in supporting programs and activities designed to meet the objectives, to ensure a robust, skilled domestic microelectronics workforce;

(II) specify the common metrics that will be used to assess progress toward achieving the objectives;

(III) describe the roles of and means of coordination with elementary and secondary, and postsecondary, education systems in achieving the objectives;

(IV) describe how Federal funding will be used to support the strategy’s microelectronics workforce initiatives;

(V) describe the approaches to be taken by each participating agency to assess the effectiveness of the agency’s microelectronics workforce programs and activities;

(VI) describe how objectives outlined in the strategic plan will align with investments made using funds from divisions A and B of Public Law 117–167 (commonly known as the CHIPS and Science Act of 2022);

(VII) describe how objectives outlined in the strategic plan will align with the objectives of the 5-year STEM education strategic plan required under section 101 of the America COMPETES Reauthorization Act of 2010 (42 U.S.C. 6621);

(VIII) describe how objectives outlined in the strategic plan will align with the objectives of the national strategy on microelectronics research, as required under subparagraph (A), as applicable; and

(IX) be made publicly available through the online clearinghouse authorized in section 102(d) of Public Law 117–167.

The Subcommittee shall coordinate programs and activities of Federal agencies relating to microelectronics workforce development, and ensure such programs and activities are consistent with the strategy required under this subparagraph.

Not less frequently than once every 5 years, the Subcommittee shall—

(I) update the strategy under this subparagraph;

(II) submit the revised strategy to the appropriate committees of Congress; and

(III) make such strategy publicly available through the online clearinghouse authorized in section 102(d) of Public Law 117–167.

In this section:

The term eligible institution means—

(A) an institution of higher education, as defined in section 101 of the Higher Education Act of 1965 (20 U.S.C. 1001), at which the highest degree predominantly awarded to students is not a baccalaureate degree or higher degree;

(B) a postsecondary vocational institution, as defined in section 102(c) of the Higher Education Act of 1965 (20 U.S.C. 1002(c)); and

(C) an area career and technical education school, as defined in subparagraphs (A) or (B) of section 3(3) of the Carl D. Perkins Career and Technical Education Act of 2006 (20 U.S.C. 2302(3)).

The term eligible partnership means a partnership that—

(A) includes—

(i) an eligible institution;

(ii) a covered entity; and

(iii) a State, Indian Tribe, or political subdivision thereof; and

(B) may include other entities.

The term National Semiconductor Technology Center means the entity established under section 9906(c).

The National Semiconductor Technology Center shall make awards, on a competitive basis, to eligible partnerships to establish or expand workforce development and academic programs offered by an eligible institution (which may include short-term programs or non-credit programs offered by that eligible institution), related to semiconductor manufacturing and related equipment, materials, advanced packaging, microelectronics, computer science, engineering, and related industries.

An eligible partnership desiring a grant under this section shall submit an application to the National Semiconductor Technology Center at such time, in such manner, and containing such information as the National Semiconductor Technology Center may require. The application shall require—

(1) a description of the eligible partnership;

(2) a description of the workforce needs that will be addressed through the activities funded by the grant;

(3) a description of the eligible partnership’s strategy to sustain such activities after the grant period;

(4) a description of how the eligible partnership will recruit and retain individuals with barriers to employment (as defined in section 3 of the Workforce Innovation and Opportunity Act definition (29 U.S.C. 3102)) in programs that receive grant funding; and

(5) a description of how programs supported by grants under this subsection align with the workforce pathways and credential frameworks established by the National Semiconductor Technology Center or the National Science Foundation.

In selecting eligible partnerships to receive a grant under this section, the National Semiconductor Technology Center shall give priority to eligible partnerships located in areas with growing microelectronics ecosystems, as determined by the National Semiconductor Technology Center, that serve or intend to serve as members of broader sectoral partnerships and coordinate with State and local workforce development boards (as established under sections 101 and 107 of the Workforce Innovation and Opportunity Act (29 U.S.C. 3111; 29 U.S.C. 3122)), respectively.

A grant awarded under this section shall be for an amount equal to or less than $7,000,000.

A grant awarded under this section shall be for a period not to exceed 5 years.

The Federal share of the costs of a grant under this section shall not exceed 50 percent of such costs.

Non-Federal costs contributed by a covered entity under this section shall be considered as part of an eligible entity’s commitments to worker and community investments as required under section 9902(a)(2)(B)(ii)(II).

Each eligible partnership receiving a grant under this section shall prepare and submit an annual report to the National Semiconductor Technology Center that contains information about each of the following with respect to individuals participating in a program funded by a grant under this section:

(A) The total number of participants, disaggregated by sex, race, and ethnicity.

(B) The total number of participants who completed the program.

(C) The indicators required by section 116(b)(2)(A)(i) of the Workforce Innovation and Opportunity Act (29 U.S.C. 3141(b)(2)(A)(i)).

Not later than 180 days of receiving the annual report under paragraph (1), the National Semiconductor Technology Center shall—

(A) prepare and submit a report containing a summary of the information described in paragraph (1) to the Committee on Commerce, Science, and Transportation and the Committee on Health, Education, Labor, and Pensions of the Senate and the Committee on Science, Space, and Technology and the Committee on Education and the Workforce of the House of Representatives; and

(B) make such report publicly available.

There are authorized to carry out this section $50,000,000 for each of fiscal years 2025, 2026, and 2027.